By Gerard Villar Piqué
This publication describes the dependent layout and optimization of effective, power processing built-in circuits. The method is multidisciplinary, masking the monolithic integration of IC layout innovations, energy electronics and regulate concept. particularly, this ebook permits readers to conceive, synthesize, layout and enforce built-in circuits with high-density high-efficiency on-chip switching energy regulators. subject matters coated surround the based layout of the on-chip energy provide, potency optimization, IC-compatible energy inductors and capacitors, energy MOSFET switches and effective swap drivers in ordinary CMOS applied sciences.
- Provides a accomplished reference on dependent layout and optimization of totally monolithic strength provides for on-chip energy administration;
- Describes a multidisciplinary method, encompassing stronger built-in strength units, either energetic and reactive, in addition to complicated circuit topologies and switching keep an eye on equipment, including their implementation;
- Enables concurrent layout of compact adaptive strength provides, including system-level and circuit-level techniques.
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Extra info for CMOS Integrated Switching Power Converters: A Structured Design Approach
Output capacitor optimized design characteristics . . . . . . . . . . Buck converter power switches optimized design characteristics . . . Compared converters main parameters . . . . . . . . . . . . . . v A and v B values along the four different converter states (large C x capacitor is considered) . . . . . . . . . . . . . . . . . . . . Switching sequence for any of the transistors of a DCM operated 3-level Buck converter (0 stands for ‘off-state’, whereas 1 stands for ‘on-state’) .
Co and C x capacitors optimized design characteristics . . . . . . . 3-level converter P1 and N1 power switches (and drivers) optimized design characteristics . . . . . . . . . . . . . . . . . . . . . 3-level converter P2 and N2 power switches (and drivers) optimized design characteristics . . . . . . . . . . . . . . . . . . . . . 3-level converter power switches optimized design overall characteristics . . . .
Main characteristics of the optimized design before the application of the output ripple constraint . . . . . . . . . . . . . . . . . . . Complete set of characteristics of the optimized design after the application of the output ripple constraint . . . . . . . . . . . . . Main characteristics and parameters of the optimized inductor design . Technological values used in example MOSCAP calculations . . . . Parameters used to characterize the tapered buffer .